x86-64: bump STACK_SIZE to 32 so that trampoline and IST stacks fit

without undue squeezing.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index e3ac5233b67f45fdc8d6d28050dadfc79a85b4cb..c53ff69ec070ae1c35287f8d165e245672f4eafb 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -807,9 +807,9 @@ static void svm_ctxt_switch_from(struct vcpu *v)
 
 #ifdef __x86_64__
     /* Resume use of ISTs now that the host TR is reinstated. */
-    idt_tables[cpu][TRAP_double_fault].a  |= 1UL << 32; /* IST1 */
-    idt_tables[cpu][TRAP_nmi].a           |= 2UL << 32; /* IST2 */
-    idt_tables[cpu][TRAP_machine_check].a |= 3UL << 32; /* IST3 */
+    idt_tables[cpu][TRAP_double_fault].a  |= IST_DF << 32;
+    idt_tables[cpu][TRAP_nmi].a           |= IST_NMI << 32;
+    idt_tables[cpu][TRAP_machine_check].a |= IST_MCE << 32;
 #endif
 }
 
@@ -832,9 +832,9 @@ static void svm_ctxt_switch_to(struct vcpu *v)
      * Cannot use ISTs for NMI/#MC/#DF while we are running with the guest TR.
      * But this doesn't matter: the IST is only req'd to handle SYSCALL/SYSRET.
      */
-    idt_tables[cpu][TRAP_double_fault].a  &= ~(3UL << 32);
-    idt_tables[cpu][TRAP_nmi].a           &= ~(3UL << 32);
-    idt_tables[cpu][TRAP_machine_check].a &= ~(3UL << 32);
+    idt_tables[cpu][TRAP_double_fault].a  &= ~(7UL << 32);
+    idt_tables[cpu][TRAP_nmi].a           &= ~(7UL << 32);
+    idt_tables[cpu][TRAP_machine_check].a &= ~(7UL << 32);
 #endif
 
     svm_restore_dr(v);

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 29bfd5f878198449cb943ad6c5156748fc14d03c..883095e5cecb3e2e7e72a9c7f7ed7506b10aedf7 100644 (file)
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3655,8 +3655,9 @@ void memguard_unguard_range(void *p, unsigned long l)
 
 void memguard_guard_stack(void *p)
 {
-    BUILD_BUG_ON((DEBUG_STACK_SIZE + PAGE_SIZE) > STACK_SIZE);
-    p = (void *)((unsigned long)p + STACK_SIZE - DEBUG_STACK_SIZE - PAGE_SIZE);
+    BUILD_BUG_ON((PRIMARY_STACK_SIZE + PAGE_SIZE) > STACK_SIZE);
+    p = (void *)((unsigned long)p + STACK_SIZE -
+                 PRIMARY_STACK_SIZE - PAGE_SIZE);
     memguard_guard_range(p, PAGE_SIZE);
 }
 

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 5390a77151452e2ea8bef08b95b49738e7e594c5..5786296a7b04ce0604d2b24af243522fe2774419 100644 (file)
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -109,7 +109,7 @@ extern void early_cpu_init(void);
 
 struct tss_struct init_tss[NR_CPUS];
 
-char __attribute__ ((__section__(".bss.page_aligned"))) cpu0_stack[STACK_SIZE];
+char __attribute__ ((__section__(".bss.stack_aligned"))) cpu0_stack[STACK_SIZE];
 
 struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1, 1, 0, 0, -1 };
 

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 7ba2abc40d6e5306d2c8043930d47cae25d16db2..d42a168dbd483f38a6da0371b4a148d0eebe6824 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -280,7 +280,7 @@ void show_stack_overflow(unsigned int cpu, unsigned long esp)
     unsigned long *stack, addr;
 
     esp_bottom = (esp | (STACK_SIZE - 1)) + 1;
-    esp_top    = esp_bottom - DEBUG_STACK_SIZE;
+    esp_top    = esp_bottom - PRIMARY_STACK_SIZE;
 
     printk("Valid stack range: %p-%p, sp=%p, tss.esp0=%p\n",
            (void *)esp_top, (void *)esp_bottom, (void *)esp,

diff --git a/xen/arch/x86/x86_32/xen.lds.S b/xen/arch/x86/x86_32/xen.lds.S
index 16fa9c895e51bc5136bace2f21ebf6b8e599e7c6..d59cff95c4f2d579cef9bd0d9fd2f989e0930a35 100644 (file)
--- a/xen/arch/x86/x86_32/xen.lds.S
+++ b/xen/arch/x86/x86_32/xen.lds.S
@@ -70,12 +70,14 @@ SECTIONS
   .data.percpu : { *(.data.percpu) } :text
   __per_cpu_data_end = .;
   . = __per_cpu_start + (NR_CPUS << PERCPU_SHIFT);
-  . = ALIGN(STACK_SIZE);
+  . = ALIGN(PAGE_SIZE);
   __per_cpu_end = .;
 
   __bss_start = .;             /* BSS */
   .bss : {
+       . = ALIGN(STACK_SIZE);
        *(.bss.stack_aligned)
+       . = ALIGN(PAGE_SIZE);
        *(.bss.page_aligned)
        *(.bss)
        } :text

diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index cd45d756cf5adc1ebc8f50dcd101241c00a328ce..7a9c2c11bf604856e3b8be8c898abb19a2d5dbc7 100644 (file)
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -292,11 +292,11 @@ void __init percpu_traps_init(void)
 
     if ( cpu == 0 )
     {
-        /* Specify dedicated interrupt stacks for NMIs and double faults. */
+        /* Specify dedicated interrupt stacks for NMI, #DF, and #MC. */
         set_intr_gate(TRAP_double_fault, &double_fault);
-        idt_table[TRAP_double_fault].a  |= 1UL << 32; /* IST1 */
-        idt_table[TRAP_nmi].a           |= 2UL << 32; /* IST2 */
-        idt_table[TRAP_machine_check].a |= 3UL << 32; /* IST3 */
+        idt_table[TRAP_double_fault].a  |= IST_DF << 32;
+        idt_table[TRAP_nmi].a           |= IST_NMI << 32;
+        idt_table[TRAP_machine_check].a |= IST_MCE << 32;
 
         /*
          * The 32-on-64 hypercall entry vector is only accessible from ring 1.
@@ -311,17 +311,20 @@ void __init percpu_traps_init(void)
     stack_bottom = (char *)get_stack_bottom();
     stack        = (char *)((unsigned long)stack_bottom & ~(STACK_SIZE - 1));
 
-    /* Machine Check handler has its own per-CPU 1kB stack. */
-    init_tss[cpu].ist[2] = (unsigned long)&stack[1024];
+    /* IST_MAX IST pages + 1 syscall page + 1 guard page + primary stack. */
+    BUILD_BUG_ON((IST_MAX + 2) * PAGE_SIZE + PRIMARY_STACK_SIZE > STACK_SIZE);
 
-    /* Double-fault handler has its own per-CPU 1kB stack. */
-    init_tss[cpu].ist[0] = (unsigned long)&stack[2048];
+    /* Machine Check handler has its own per-CPU 4kB stack. */
+    init_tss[cpu].ist[IST_MCE] = (unsigned long)&stack[IST_MCE * PAGE_SIZE];
 
-    /* NMI handler has its own per-CPU 1kB stack. */
-    init_tss[cpu].ist[1] = (unsigned long)&stack[3072];
+    /* Double-fault handler has its own per-CPU 4kB stack. */
+    init_tss[cpu].ist[IST_DF] = (unsigned long)&stack[IST_DF * PAGE_SIZE];
+
+    /* NMI handler has its own per-CPU 4kB stack. */
+    init_tss[cpu].ist[IST_NMI] = (unsigned long)&stack[IST_NMI * PAGE_SIZE];
 
     /* Trampoline for SYSCALL entry from long mode. */
-    stack = &stack[3072]; /* Skip the NMI and DF stacks. */
+    stack = &stack[IST_MAX * PAGE_SIZE]; /* Skip the IST stacks. */
     wrmsr(MSR_LSTAR, (unsigned long)stack, ((unsigned long)stack>>32));
     stack += write_stack_trampoline(stack, stack_bottom, FLAT_KERNEL_CS64);
 

diff --git a/xen/arch/x86/x86_64/xen.lds.S b/xen/arch/x86/x86_64/xen.lds.S
index 01336842bd8978815a65e75fbdc26bc855e779c1..4ff12a01c2edc968de31f50908579e863ee34c4a 100644 (file)
--- a/xen/arch/x86/x86_64/xen.lds.S
+++ b/xen/arch/x86/x86_64/xen.lds.S
@@ -68,12 +68,14 @@ SECTIONS
   .data.percpu : { *(.data.percpu) } :text
   __per_cpu_data_end = .;
   . = __per_cpu_start + (NR_CPUS << PERCPU_SHIFT);
-  . = ALIGN(STACK_SIZE);
+  . = ALIGN(PAGE_SIZE);
   __per_cpu_end = .;
 
   __bss_start = .;             /* BSS */
   .bss : {
+       . = ALIGN(STACK_SIZE);
        *(.bss.stack_aligned)
+       . = ALIGN(PAGE_SIZE);
        *(.bss.page_aligned)
        *(.bss)
        } :text

diff --git a/xen/include/asm-x86/config.h b/xen/include/asm-x86/config.h
index 5590928a4fe2a2c2c719f3ecd3e708ba00714563..30dcd1f866121f554e11465e16b71d6cc2cfc71d 100644 (file)
--- a/xen/include/asm-x86/config.h
+++ b/xen/include/asm-x86/config.h
@@ -77,11 +77,15 @@
 #define MEMORY_GUARD
 #endif
 
+#ifdef __i386__
 #define STACK_ORDER 2
+#else
+#define STACK_ORDER 3
+#endif
 #define STACK_SIZE  (PAGE_SIZE << STACK_ORDER)
 
-/* Debug stack is restricted to 8kB by guard pages. */
-#define DEBUG_STACK_SIZE 8192
+/* Primary stack is restricted to 8kB by guard pages. */
+#define PRIMARY_STACK_SIZE 8192
 
 #define CONFIG_DMA_BITSIZE 32
 

diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 6a44e505d0729c0e7975b4ee5c3e9d04eac5cc7a..9add6de1e924cc7c77df12da892aa3439664d03c 100644 (file)
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -448,6 +448,13 @@ struct tss_struct {
     u8 __cacheline_filler[24];
 } __cacheline_aligned __attribute__((packed));
 
+#ifdef __x86_64__
+# define IST_DF  1UL
+# define IST_NMI 2UL
+# define IST_MCE 3UL
+# define IST_MAX 3UL
+#endif
+
 #define IDT_ENTRIES 256
 extern idt_entry_t idt_table[];
 extern idt_entry_t *idt_tables[];